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Architecture of a fieldbus message scheduler coprocessor based on the planning paradigm

2002Journal article Open access
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dc.contributor.authorMartins, Ernesto V.
dc.contributor.authorNeves, Paulo Alexandre
dc.contributor.authorFonseca, José A.
dc.date.accessioned2011-02-08T17:03:32Z
dc.date.available2011-02-08T17:03:32Z
dc.date.issued2002
dc.description.abstractThe use of a centralised planning scheduler in fieldbus-based systems requiring real-time operation has proved to be a good compromise between operational ̄exibility and timeliness guarantees. It is particularly well adapted to embedded systems based on low-processing power microcontrollers due to the low overhead it imposes. In this paper a preliminary implementation of a hardware scheduling coprocessor based on the planning paradigm is presented. The coprocessor is installed in a special node of the fieldbus, the bus arbiter, and generates scheduling tables to be dispatched by the node CPU. With this solution it is possible to decrease the response time to changes in the system con®guration or message parameters of the software- based planning scheduler. This opens the possibility of allowing automatic on-line changes requested by system nodes in addition to the ones requested by human operators, thus improving system reactivity. The paper includes a short review of the planning technique and a discussion on the motivation to develop the coprocessor as well as on recent similar and related work. The coprocessor architecture and several implementation details such as its interface with the arbiter CPU are presented. The initial calculations showing the feasibility of the unit are also derived, together with the first real implementation of the coprocessor itself.por
dc.identifier.citationMARTINS, Ernesto; NEVES, Paulo; FONSECA, José - Architecture of a fieldbus message scheduler coprocessor based on the planning paradigm. Microprocessor and Microsystems. ISSN 0141-9331. Vol. 26, nº 3 (Abril 2002), p. 97-106por
dc.identifier.issn0141-9331
dc.identifier.urihttp://hdl.handle.net/10400.11/536
dc.language.isoengpor
dc.peerreviewedyespor
dc.publisherElsevier Science BVpor
dc.subjectReal-time message schedulingpor
dc.subjectCoprocessorspor
dc.subjectFieldbusespor
dc.subjectDigital systemspor
dc.titleArchitecture of a fieldbus message scheduler coprocessor based on the planning paradigmpor
dc.typejournal article
dspace.entity.typePublication
oaire.citation.endPage106por
oaire.citation.startPage97por
oaire.citation.titleMicroprocessors and Microssystemspor
person.familyNameNeves
person.givenNamePaulo Alexandre
person.identifier.orcid0000-0002-7958-973X
rcaap.rightsopenAccesspor
rcaap.typearticlepor
relation.isAuthorOfPublicationc90b1bfb-be87-49f0-ae6e-f149a11f9009
relation.isAuthorOfPublication.latestForDiscoveryc90b1bfb-be87-49f0-ae6e-f149a11f9009

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